[PATCH] D89451: [SystemZ] Mark unsaved argument R6 as live throughout function

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp:369
+        MachineInstrBuilder(MF, MBB.back())
+          .addReg(SystemZ::R6D, RegState::Implicit);
+    }
----------------
jonpa wrote:
> uweigand wrote:
> > Just one question here: do we need to explicitly add this use?  If I followed your description in the bugzilla correctly, all callee-saved register are implicitly considered used at the end of the return block?
> Good question... It seems both LiveRegUnits and LivePhysRegs classes do special-treat the return blocks so it might be that this is implicitly modelled in the IR. RegScavenger uses LiveRegUnits (I don't know why there are two different classes for this) so in this particular case the use operands are not needed.
> 
> I now see a comment at LivePhysRegs::addLiveOutsNoPristines():
> 
> ```
>     // Return blocks are a special case because we currently don't mark up
>     // return instructions completely: specifically, there is no explicit
>     // use for callee-saved registers. So we add all callee saved registers
>     // that are saved and restored (somewhere). This does not include
>     // callee saved registers that are unused and hence not saved and
>     // restored; they are called pristine.
>     // FIXME: PEI should add explicit markings to return instructions
>     // instead of implicitly handling them here.
> 
> ``` 
> It seems there is some intent on moving towards explicit use operands on return instructions instead?
> 
> The notion of a "pristine" register meaning an unused callee saved reg, makes me think we may want to be explicit about R6 since that seems to imply it is completely unused, which may not be true...?
> 
> 
I guess LivePhysRegs/LiveRegUnits will treat r6 as "pristine" since we don't save/restore it.  I guess, thinking about it a bit more, that might means it's okay to skip marking up the liveins and the return instructions; it's implicitly live anyway.

As far as I can tell, nothing cares if something reads a pristine register; it's only a problem if an instruction writes/kills one.  But there's so little code that runs this late in the pipeline, I'm not sure how consistent everything really is, anyway.


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  https://reviews.llvm.org/D89451/new/

https://reviews.llvm.org/D89451