[PATCH] D89447: [MachineInstr] Add support for instructions with multiple memory operands.

[Michael Liao via Phabricator via llvm-commits]

hliao created this revision.
hliao added reviewers: efriedma, qcolombet, hfinkel, craig.topper, t.p.northover, uweigand.
Herald added subscribers: llvm-commits, pengfei, dmgreen, hiraditya.
Herald added a project: LLVM.
hliao requested review of this revision.

- Basically iterate each pair of memory operands from both instructions and return true if any of them may alias.
- The exception are memory instructions without any memory operand. They may touch everything and could alias to any memory instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D89447

Files:
  llvm/lib/CodeGen/MachineInstr.cpp
  llvm/test/CodeGen/AArch64/merge-store-dependency.ll
  llvm/test/CodeGen/ARM/big-endian-neon-fp16-bitconv.ll
  llvm/test/CodeGen/SystemZ/vec-load-element.ll
  llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
  llvm/test/CodeGen/Thumb2/mve-phireg.ll
  llvm/test/CodeGen/Thumb2/mve-vst3.ll
  llvm/test/CodeGen/Thumb2/umulo-128-legalisation-lowering.ll
  llvm/test/CodeGen/X86/store_op_load_fold2.ll

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