[PATCH] D89415: [AArch64][GlobalISel] Introduce a new post-isel optimization pass
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 14 12:39:39 PDT 2020
aemerson added inline comments.
================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp:91
+ // If this instruction uses NZCV, then NZCV is live.
+ if (II->readsRegister(AArch64::NZCV)) {
+ NZCVIsLive = true;
----------------
paquette wrote:
> Maybe a sledgehammer, but would it make sense to use LiveRegUnits here?
>
> e.g. something like this would probably work?
>
> ```
> LiveRegUnits LRU(...);
> LRU.addLiveOuts(MBB);
> bool NZCVDead = LRU.available(AArch64::NZCV);
> for (...) {
> LRU.stepBackward(*II);
>
> // Did this instruction define NZCV?
> bool NZCVDeadAtCurrInstr = LRU.available(AArch64::NZCV);
> if (NZCVDead && !NZCVDeadAtCurrInstr) {
> // If we have a def and NZCV is dead...
> }
>
> NZCVDead = NZCVDeadAtCurrInstr;
> }
> ```
This particular optimization isn't needed anymore, but yes I couldn't quite remember what that LiveRegUnits utility was called.
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https://reviews.llvm.org/D89415/new/
https://reviews.llvm.org/D89415
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