[PATCH] D89390: [TargetLowering] Update optimization to check for boolean content

Erik Hogeman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 14 06:29:00 PDT 2020


ErikHogeman created this revision.
ErikHogeman added a reviewer: craig.topper.
Herald added subscribers: llvm-commits, pengfei, hiraditya.
Herald added a project: LLVM.
ErikHogeman requested review of this revision.

Updates an optimization that relies on boolean contents being either 0 or 1 to properly check for this before triggering.

The following:
(X & 8) != 0  -->  (X & 8) >> 3
Produces unexpected results when a boolean 'true' value is represented by negative one.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D89390

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp


Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3949,7 +3949,8 @@
     EVT ShValTy = N0.getValueType();
 
     // Fold bit comparisons when we can.
-    if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
+    if (getBooleanContents(N0.getValueType()) == ZeroOrOneBooleanContent &&
+        (Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
         (VT == ShValTy || (isTypeLegal(VT) && VT.bitsLE(ShValTy))) &&
         N0.getOpcode() == ISD::AND) {
       if (auto *AndRHS = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {


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