[llvm] 9b4db7f - [InstCombine] Add undef funnel shift amount test coverage

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-10-14T11:58:37+01:00
New Revision: 9b4db7f73331986768e113140e5b929b9cdcab33

URL: https://github.com/llvm/llvm-project/commit/9b4db7f73331986768e113140e5b929b9cdcab33
DIFF: https://github.com/llvm/llvm-project/commit/9b4db7f73331986768e113140e5b929b9cdcab33.diff

LOG: [InstCombine] Add undef funnel shift amount test coverage

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/fsh.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/fsh.ll b/llvm/test/Transforms/InstCombine/fsh.ll
index ab0e000d40f8..49a8ef07d7f4 100644
--- a/llvm/test/Transforms/InstCombine/fsh.ll
+++ b/llvm/test/Transforms/InstCombine/fsh.ll
@@ -362,6 +362,22 @@ define i33 @fshr_constant_shift_amount_modulo_bitwidth(i33 %x, i33 %y) {
   ret i33 %r
 }
 
+define i32 @fshl_undef_shift_amount(i32 %x, i32 %y) {
+; CHECK-LABEL: @fshl_undef_shift_amount(
+; CHECK-NEXT:    ret i32 [[X:%.*]]
+;
+  %r = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 undef)
+  ret i32 %r
+}
+
+define i33 @fshr_undef_shift_amount(i33 %x, i33 %y) {
+; CHECK-LABEL: @fshr_undef_shift_amount(
+; CHECK-NEXT:    ret i33 [[Y:%.*]]
+;
+  %r = call i33 @llvm.fshr.i33(i33 %x, i33 %y, i33 undef)
+  ret i33 %r
+}
+
 @external_global = external global i8
 
 define i33 @fshr_constant_shift_amount_modulo_bitwidth_constexpr(i33 %x, i33 %y) {
@@ -402,6 +418,22 @@ define <2 x i31> @fshl_constant_shift_amount_modulo_bitwidth_vec_const_expr(<2 x
   ret <2 x i31> %r
 }
 
+define <2 x i31> @fshl_undef_shift_amount_vec(<2 x i31> %x, <2 x i31> %y) {
+; CHECK-LABEL: @fshl_undef_shift_amount_vec(
+; CHECK-NEXT:    ret <2 x i31> [[X:%.*]]
+;
+  %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> undef)
+  ret <2 x i31> %r
+}
+
+define <2 x i32> @fshr_undef_shift_amount_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @fshr_undef_shift_amount_vec(
+; CHECK-NEXT:    ret <2 x i32> [[Y:%.*]]
+;
+  %r = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> undef)
+  ret <2 x i32> %r
+}
+
 ; TODO: Don't let SimplifyDemandedBits split up a rotate - keep the same operand.
 
 define i32 @rotl_common_demanded(i32 %a0) {