[PATCH] D86078: [AArch64] Improved lowering for saturating float to int.
Mikael Holmén via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 14 00:39:11 PDT 2020
uabelho added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3142
+ // vector support and the min/max integer pattern does not.
+ if (DstWidth != SatWidth && SrcVT.isVector() && AreExactFloatBounds &&
+ MinMaxLegal) {
----------------
We explicitly did
```
if (DstWidth == SatWidth)
return Op;
```
at line 3105 above, so the
```
DstWidth != SatWidth
```
comparison should always be true here?
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3164
+ // when the scalar size of the type is the same (e.g. f32 -> i32).
+ if (DstWidth == SatWidth &&
+ (!SrcVT.isVector() ||
----------------
Always false since we already did
```
if (DstWidth == SatWidth)
return Op;
```
at 3105?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D86078/new/
https://reviews.llvm.org/D86078
More information about the llvm-commits
mailing list