[lld] f218652 - LLD/AMDGPU: Infer os abi based on input llvm bitcode

[Konstantin Zhuravlyov via llvm-commits]

Author: Konstantin Zhuravlyov
Date: 2020-10-13T12:20:28-04:00
New Revision: f218652a36bdf0ecd842c30da7a3936dc6580e96

URL: https://github.com/llvm/llvm-project/commit/f218652a36bdf0ecd842c30da7a3936dc6580e96
DIFF: https://github.com/llvm/llvm-project/commit/f218652a36bdf0ecd842c30da7a3936dc6580e96.diff

LOG: LLD/AMDGPU: Infer os abi based on input llvm bitcode

Differential Revision: https://reviews.llvm.org/D89042

Added: 
    lld/test/ELF/lto/amdgcn-oses.ll

Modified: 
    lld/ELF/InputFiles.cpp

Removed: 
    


################################################################################
diff  --git a/lld/ELF/InputFiles.cpp b/lld/ELF/InputFiles.cpp
index e35b837f848c..70134d5ca0ef 100644
--- a/lld/ELF/InputFiles.cpp
+++ b/lld/ELF/InputFiles.cpp
@@ -1555,6 +1555,19 @@ static uint16_t getBitcodeMachineKind(StringRef path, const Triple &t) {
   }
 }
 
+static uint8_t getOsAbi(const Triple &t) {
+  switch (t.getOS()) {
+  case Triple::AMDHSA:
+    return ELF::ELFOSABI_AMDGPU_HSA;
+  case Triple::AMDPAL:
+    return ELF::ELFOSABI_AMDGPU_PAL;
+  case Triple::Mesa3D:
+    return ELF::ELFOSABI_AMDGPU_MESA3D;
+  default:
+    return ELF::ELFOSABI_NONE;
+  }
+}
+
 BitcodeFile::BitcodeFile(MemoryBufferRef mb, StringRef archiveName,
                          uint64_t offsetInArchive)
     : InputFile(BitcodeKind, mb) {
@@ -1582,6 +1595,7 @@ BitcodeFile::BitcodeFile(MemoryBufferRef mb, StringRef archiveName,
   Triple t(obj->getTargetTriple());
   ekind = getBitcodeELFKind(t);
   emachine = getBitcodeMachineKind(mb.getBufferIdentifier(), t);
+  osabi = getOsAbi(t);
 }
 
 static uint8_t mapVisibility(GlobalValue::VisibilityTypes gvVisibility) {

diff  --git a/lld/test/ELF/lto/amdgcn-oses.ll b/lld/test/ELF/lto/amdgcn-oses.ll
new file mode 100644
index 000000000000..8ee05de8c389
--- /dev/null
+++ b/lld/test/ELF/lto/amdgcn-oses.ll
@@ -0,0 +1,44 @@
+; REQUIRES: amdgpu
+
+; RUN: split-file %s %t
+
+; RUN: llvm-as %t/amdhsa.ll -o %t/amdhsa.o
+; RUN: ld.lld %t/amdhsa.o -o %t/amdhsa.so
+; RUN: llvm-readobj --file-headers %t/amdhsa.so | FileCheck %s --check-prefixes=GCN,AMDHSA
+
+; RUN: llvm-as %t/amdpal.ll -o %t/amdpal.o
+; RUN: ld.lld %t/amdpal.o -o %t/amdpal.so
+; RUN: llvm-readobj --file-headers %t/amdpal.so | FileCheck %s --check-prefixes=GCN,AMDPAL
+
+; RUN: llvm-as %t/mesa3d.ll -o %t/mesa3d.o
+; RUN: ld.lld %t/mesa3d.o -o %t/mesa3d.so
+; RUN: llvm-readobj --file-headers %t/mesa3d.so | FileCheck %s --check-prefixes=GCN,MESA3D
+
+; AMDHSA: OS/ABI: AMDGPU_HSA (0x40)
+; AMDPAL: OS/ABI: AMDGPU_PAL (0x41)
+; MESA3D: OS/ABI: AMDGPU_MESA3D (0x42)
+; GCN: ABIVersion: 0
+
+;--- amdhsa.ll
+target triple = "amdgcn-amd-amdhsa"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}
+
+;--- amdpal.ll
+target triple = "amdgcn-amd-amdpal"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}
+
+;--- mesa3d.ll
+target triple = "amdgcn-amd-mesa3d"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}