[PATCH] D89025: [RISCV] Add -mtune support

Luís Marques via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 13 08:11:38 PDT 2020


luismarques accepted this revision.
luismarques added a comment.
This revision is now accepted and ready to land.

LGTM, but I would like other people to also review this, if possible.
(Just be sure to check/fix the clang-format warnings and the inline comments).



================
Comment at: clang/test/Driver/riscv-cpus.c:29
+
+// Check mtune alias CPU has resolve to the right CPU according XLEN.
+// RUN: %clang -target riscv32 -### -c %s 2>&1 -mtune=generic | FileCheck -check-prefix=MTUNE-GENERIC-32 %s
----------------
Nit: resolve -> resolved.


================
Comment at: clang/test/Driver/riscv-cpus.c:82
+// Check interaction between mcpu and mtune.
+//
+// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=sifive-e31 -mtune=sifive-e76 | FileCheck -check-prefix=MTUNE-E31-MCPU-E76 %s
----------------
khchen wrote:
> maybe we can describe what is expected interaction behavior somewhere.
+1


================
Comment at: llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp:201
   const RISCVTargetMachine &RTM = static_cast<const RISCVTargetMachine &>(TM);
-  const RISCVSubtarget STI(TT, CPU, FS, /*ABIName=*/"", RTM);
+  /* TuneCPU don't impact emission for ELF attributes, ELF attribute only
+     care about arch related features, so we can set TuneCPU as CPU.  */
----------------
Nit: don't -> doesn't; for -> of; attribute -> attributes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89025/new/

https://reviews.llvm.org/D89025



More information about the llvm-commits mailing list