[PATCH] D89214: [X86] Add basic computeKnownBits support for X86ISD::BSR
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 12 10:41:24 PDT 2020
craig.topper added a comment.
In D89214#2325139 <https://reviews.llvm.org/D89214#2325139>, @RKSimon wrote:
> Also, can BSF be handled here as well?
Technically yes, we just didn't have test coverage for it. Probably because we only use X86ISD::BSF when we immediately emit a CMOV for CTTZ and we need to connect the flag output. For CTTZ_ZERO_UNDEF we match BSF in isel patterns.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:34045
+ // TODO: Bound with input known bits?
+ Known.Zero.setBitsFrom(Log2_32(BitWidth));
+ break;
----------------
RKSimon wrote:
> I'm a bit worried about not handling the src==0 undef case - how well does this work if we guarded it with a KnownNeverZero check?
The case I was trying to fix was this cross basic block case from the OPTIMIZE version of https://skanthak.homepage.t-online.de/llvm.html#case21
I doubt KnownNeverZero would work since its control flow dependent and it looks like the SelectionDAG implementation is only handles non-zero constants or an OR involving a non-zero constant.
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https://reviews.llvm.org/D89214/new/
https://reviews.llvm.org/D89214
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