[PATCH] D89187: [AMDGPU] Minimize number of s_mov generated by copyPhysReg

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 12 02:33:01 PDT 2020


foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:665
+    const TargetRegisterClass *CopyRC = RI.getPhysRegClass(CopyReg);
+    if (CopyRC == &AMDGPU::SReg_32_XM0RegClass ||
+        CopyRC == &AMDGPU::SReg_32RegClass) {
----------------
Is this "if" just an optimization?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:676-678
+  // If all registers have been overwritten then we must still
+  // generate something to define the super register and kill
+  // the source.  So remove one overwrite.
----------------
In this case would it be better to generate an IMPLICIT_DEF of the superregister, instead of a real copy?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:693
+
+    // Is SGPR aligned? If so try to combined with next.
+    Register Src = RI.getSubReg(SrcReg, SubIdx);
----------------
Typo "combine".


Repository:
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  https://reviews.llvm.org/D89187/new/

https://reviews.llvm.org/D89187



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