[PATCH] D89139: [DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns

[Jay Foad via Phabricator via llvm-commits]

foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.

Looks good to me if the target maintainers are happy.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:1132
 
-  unsigned OldBits = N->getOperand(0).getScalarValueSizeInBits();
-  unsigned NewBits = Hi.getScalarValueSizeInBits();
-
   // Shift Lo up to occupy the upper bits of the promoted type.
   SDLoc DL(N);
----------------
Move this comment to line 1162.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89139/new/

https://reviews.llvm.org/D89139