[PATCH] D89217: [AMDGPU] Base getSubRegFromChannel on TableGen data
Carl Ritson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 11 22:14:24 PDT 2020
critson created this revision.
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Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
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Generate (at runtime) the table used to drive getSubRegFromChannel,
base on AMDGPUSubRegIdxRanges from TableGen data.
The is a step closer to it being staticly generated by TableGen and
allows getSubRegFromChannel handle all bitwidths in the mean time.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D89217
Files:
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
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