[PATCH] D89200: [X86] Add custom type legalization for i64 saddo/ssubo on 32-bit targets. Same for i128 on 64-bit targets.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/X86/known-bits.ll:149
+; X32-NEXT:    xorl %esi, %esi
+; X32-NEXT:    addl $0, %esi
+; X32-NEXT:    adcl %eax, %ecx
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RKSimon wrote:
> Any idea what happened here?
We don't see the zeroes until after type legalization and we don't have constant folding for X86ISD::ADD. Probably because we'd need to know which flags are being used.

I suppose we could combine it by looking back from the ADC?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D89200/new/

https://reviews.llvm.org/D89200