[llvm] f81200a - [InstCombine] add one-use check to add+xor transform
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 11 06:09:39 PDT 2020
Author: Sanjay Patel
Date: 2020-10-11T09:04:24-04:00
New Revision: f81200ae9959e0b0c66a2191f30afb8dd5bf7afa
URL: https://github.com/llvm/llvm-project/commit/f81200ae9959e0b0c66a2191f30afb8dd5bf7afa
DIFF: https://github.com/llvm/llvm-project/commit/f81200ae9959e0b0c66a2191f30afb8dd5bf7afa.diff
LOG: [InstCombine] add one-use check to add+xor transform
As shown in the affected test, we could increase instruction
count without this limitation. There's another test with extra
use that shows we still convert directly to a real "sext" if
possible.
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
llvm/test/Transforms/InstCombine/signext.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 7fc472de5790..2dd5180378a1 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1290,7 +1290,7 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
Type *Ty = I.getType();
if (ConstantInt *CI = dyn_cast<ConstantInt>(RHS)) {
Value *XorLHS = nullptr; ConstantInt *XorRHS = nullptr;
- if (match(LHS, m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS)))) {
+ if (match(LHS, m_OneUse(m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS))))) {
unsigned TySizeBits = Ty->getScalarSizeInBits();
const APInt &RHSVal = CI->getValue();
unsigned ExtendAmt = 0;
diff --git a/llvm/test/Transforms/InstCombine/signext.ll b/llvm/test/Transforms/InstCombine/signext.ll
index 64eea3ee55e3..4faf4e384874 100644
--- a/llvm/test/Transforms/InstCombine/signext.ll
+++ b/llvm/test/Transforms/InstCombine/signext.ll
@@ -22,8 +22,7 @@ define i32 @sextinreg_extra_use(i32 %x) {
; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 65535
; CHECK-NEXT: [[T2:%.*]] = xor i32 [[T1]], -32768
; CHECK-NEXT: call void @use(i32 [[T2]])
-; CHECK-NEXT: [[SEXT:%.*]] = shl i32 [[X]], 16
-; CHECK-NEXT: [[T3:%.*]] = ashr exact i32 [[SEXT]], 16
+; CHECK-NEXT: [[T3:%.*]] = add nsw i32 [[T2]], 32768
; CHECK-NEXT: ret i32 [[T3]]
;
%t1 = and i32 %x, 65535
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