[PATCH] D88742: [AArch64] Identify SAD pattern
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 10 03:17:30 PDT 2020
dmgreen added a comment.
Thanks. https://alive2.llvm.org/ce/z/R7TNGK suggests this should be fine for sign extends too, which would be great to add.
@RKSimon As I mentioned in https://reviews.llvm.org/D88897#2316214 I'd like to make this target independent, If you don't mind waiting for me to port this over I am happy to do that later.
================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:11065-11066
+ // Check if the operands of the sub are zero-extended.
+ if (Op0.getOpcode() != ISD::ZERO_EXTEND ||
+ Op1.getOpcode() != ISD::ZERO_EXTEND)
+ return SDValue();
----------------
Can you change this to checking for sign extend or zero extend, then produce AArch64ISD::UABD or AArch64ISD::SABD as needed.
I believe that the final ISD::ZERO_EXTEND would remain as a zext for UABD or SABD.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D88742/new/
https://reviews.llvm.org/D88742
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