[llvm] c3de9a9 - Fix incorect Register -> MCRegister conversion

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2020-10-08T21:40:48-07:00
New Revision: c3de9a9e69f63c4ff5f4891b5055be1b7318a930

URL: https://github.com/llvm/llvm-project/commit/c3de9a9e69f63c4ff5f4891b5055be1b7318a930
DIFF: https://github.com/llvm/llvm-project/commit/c3de9a9e69f63c4ff5f4891b5055be1b7318a930.diff

LOG: Fix incorect Register -> MCRegister conversion

getReg returns a Register which may represent a virtual register.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 8f3aae3eff0c..287ee3b8d21f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -93,7 +93,7 @@ bool TargetLowering::parametersInCSRMatch(const MachineRegisterInfo &MRI,
     SDValue Value = OutVals[I];
     if (Value->getOpcode() != ISD::CopyFromReg)
       return false;
-    MCRegister ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
+    Register ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
     if (MRI.getLiveInPhysReg(ArgReg) != Reg)
       return false;
   }