[llvm] e1b5fcb - [InstCombine] Add additional trunc(shl(x,c)) -> shl(trunc(x),trunc(c)) vector tests

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-10-08T21:11:48+01:00
New Revision: e1b5fcb9424a39ec663675604dca77aa98b347c1

URL: https://github.com/llvm/llvm-project/commit/e1b5fcb9424a39ec663675604dca77aa98b347c1
DIFF: https://github.com/llvm/llvm-project/commit/e1b5fcb9424a39ec663675604dca77aa98b347c1.diff

LOG: [InstCombine] Add additional trunc(shl(x,c)) -> shl(trunc(x),trunc(c)) vector tests

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/trunc.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/trunc.ll b/llvm/test/Transforms/InstCombine/trunc.ll
index d8a615cc4c9a..c1c4749a304f 100644
--- a/llvm/test/Transforms/InstCombine/trunc.ll
+++ b/llvm/test/Transforms/InstCombine/trunc.ll
@@ -755,6 +755,50 @@ define i32 @trunc_shl_lshr_infloop(i64 %arg) {
   ret i32 %C
 }
 
+define <2 x i32> @trunc_shl_v2i32_v2i64_uniform(<2 x i64> %val) {
+; CHECK-LABEL: @trunc_shl_v2i32_v2i64_uniform(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 31>
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
+; CHECK-NEXT:    ret <2 x i32> [[TRUNC]]
+;
+  %shl = shl <2 x i64> %val, <i64 31, i64 31>
+  %trunc = trunc <2 x i64> %shl to <2 x i32>
+  ret <2 x i32> %trunc
+}
+
+define <2 x i32> @trunc_shl_v2i32_v2i64_undef(<2 x i64> %val) {
+; CHECK-LABEL: @trunc_shl_v2i32_v2i64_undef(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 undef>
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
+; CHECK-NEXT:    ret <2 x i32> [[TRUNC]]
+;
+  %shl = shl <2 x i64> %val, <i64 31, i64 undef>
+  %trunc = trunc <2 x i64> %shl to <2 x i32>
+  ret <2 x i32> %trunc
+}
+
+define <2 x i32> @trunc_shl_v2i32_v2i64_nonuniform(<2 x i64> %val) {
+; CHECK-LABEL: @trunc_shl_v2i32_v2i64_nonuniform(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 12>
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
+; CHECK-NEXT:    ret <2 x i32> [[TRUNC]]
+;
+  %shl = shl <2 x i64> %val, <i64 31, i64 12>
+  %trunc = trunc <2 x i64> %shl to <2 x i32>
+  ret <2 x i32> %trunc
+}
+
+define <2 x i32> @trunc_shl_v2i32_v2i64_outofrange(<2 x i64> %val) {
+; CHECK-LABEL: @trunc_shl_v2i32_v2i64_outofrange(
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i64> [[VAL:%.*]], <i64 31, i64 33>
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
+; CHECK-NEXT:    ret <2 x i32> [[TRUNC]]
+;
+  %shl = shl <2 x i64> %val, <i64 31, i64 33>
+  %trunc = trunc <2 x i64> %shl to <2 x i32>
+  ret <2 x i32> %trunc
+}
+
 define i32 @trunc_shl_ashr_infloop(i64 %arg) {
 ; CHECK-LABEL: @trunc_shl_ashr_infloop(
 ; CHECK-NEXT:    [[A:%.*]] = ashr i64 [[ARG:%.*]], 3