[PATCH] D88783: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri requested changes to this revision.
lebedev.ri added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp:2088
 
+    // (shl ShVal, X) | (lshr ShVal, (Width - x)) iff X < Width
+    if (match(R, m_OneUse(m_Sub(m_SpecificInt(Width), m_Specific(L))))) {
----------------
`// (shl ShVal, L) | (lshr ShVal, (Width - L)) iff L < Width`


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Comment at: llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp:2090-2091
+    if (match(R, m_OneUse(m_Sub(m_SpecificInt(Width), m_Specific(L))))) {
+      KnownBits KnownL = IC.computeKnownBits(L, /*Depth*/ 0, &Or);
+      return KnownL.getMaxValue().ult(Width) ? L : nullptr;
+    }
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Either this needs a motivational comment, or this can be dropped.
```
----------------------------------------
define i64 @src(i64 %x, i64 %y, i64 %a) {
%0:
  %mask = and i64 %a, -1
  %shl = shl i64 %x, %mask
  %sub = sub nsw nuw i64 64, %mask
  %shr = lshr i64 %y, %sub
  %r = or i64 %shl, %shr
  ret i64 %r
}
=>
define i64 @tgt(i64 %x, i64 %y, i64 %a) {
%0:
  %r = fshl i64 %x, i64 %y, i64 %a
  ret i64 %r
}
Transformation seems to be correct!

```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88783/new/

https://reviews.llvm.org/D88783