[PATCH] D88999: [Statepoints] Allow deopt GC pointer on VReg if gc-live bundle is empty.

[Denis Antrushin via Phabricator via llvm-commits]

dantrushin created this revision.
dantrushin added reviewers: reames, skatkov.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
dantrushin requested review of this revision.

Currently we allow passing pointers from deopt bundle on VReg only if
they were seen in list of gc-live pointers passed on VRegs.
This means that for the case of empty gc-live bundle we spill deopt
bundle's pointers. This change allows lowering deopt pointers to VRegs
in case of empty gc-live bundle. In case of non-empty gc-live bundle,
behavior does not change.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88999

Files:
  llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
  llvm/test/CodeGen/X86/statepoint-vreg-details.ll


Index: llvm/test/CodeGen/X86/statepoint-vreg-details.ll
===================================================================
--- llvm/test/CodeGen/X86/statepoint-vreg-details.ll
+++ llvm/test/CodeGen/X86/statepoint-vreg-details.ll
@@ -326,16 +326,14 @@
 ;CHECK-VREG:     %0:gr64 = STATEPOINT 1, 16, 5, %8, $edi, $rsi, $edx, $ecx, $r8d, 2, 0, 2, 0, 2, 0, 2, 1, killed %1(tied-def 0), 2, 0, 2, 1, 0, 0, csr_64, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
 ;CHECK-VREG:     JMP_1 %bb.1
 ;CHECK-VREG:   bb.1.normal_continue:
-;CHECK-VREG:     MOV64mr %stack.0, 1, $noreg, 0, $noreg, %0 :: (store 8 into %stack.0)
 ;CHECK-VREG:     %13:gr32 = MOV32ri 10
 ;CHECK-VREG:     $edi = COPY %13
-;CHECK-VREG:     STATEPOINT 2882400000, 0, 1, @__llvm_deoptimize, $edi, 2, 0, 2, 2, 2, 2, 1, 8, %stack.0, 0, 1, 8, %stack.0, 0, 2, 0, 2, 0, 2, 0, csr_64, implicit-def $rsp, implicit-def $ssp :: (volatile load store 8 on %stack.0)
+;CHECK-VREG:     STATEPOINT 2882400000, 0, 1, @__llvm_deoptimize, $edi, 2, 0, 2, 2, 2, 2, %0, %0, 2, 0, 2, 0, 2, 0, csr_64, implicit-def $rsp, implicit-def $ssp
 ;CHECK-VREG:   bb.2.exceptional_return (landing-pad):
 ;CHECK-VREG:     EH_LABEL <mcsymbol >
-;CHECK-VREG:     MOV64mr %stack.0, 1, $noreg, 0, $noreg, %0 :: (store 8 into %stack.0)
 ;CHECK-VREG:     %12:gr32 = MOV32ri -271
 ;CHECK-VREG:     $edi = COPY %12
-;CHECK-VREG:     STATEPOINT 2882400000, 0, 1, @__llvm_deoptimize, $edi, 2, 0, 2, 0, 2, 1, 1, 8, %stack.0, 0, 2, 0, 2, 0, 2, 0, csr_64, implicit-def $rsp, implicit-def $ssp :: (volatile load store 8 on %stack.0)
+;CHECK-VREG:     STATEPOINT 2882400000, 0, 1, @__llvm_deoptimize, $edi, 2, 0, 2, 0, 2, 1, %0, 2, 0, 2, 0, 2, 0, csr_64, implicit-def $rsp, implicit-def $ssp
 
 entry:
   %local.0 = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef, align 8
Index: llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
+++ llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
@@ -557,6 +557,10 @@
 
   unsigned CurNumVRegs = 0;
 
+  auto canPassGCPtrOnVReg = [&](SDValue SDV) {
+    return !(willLowerDirectly(SDV) || SDV.getValueType().isVector());
+  };
+
   auto processGCPtr = [&](const Value *V) {
     SDValue PtrSD = Builder.getValue(V);
     if (!LoweredGCPtrs.insert(PtrSD))
@@ -566,7 +570,9 @@
     assert(!LowerAsVReg.count(PtrSD) && "must not have been seen");
     if (LowerAsVReg.size() == MaxVRegPtrs)
       return;
-    if (willLowerDirectly(PtrSD) || V->getType()->isVectorTy()) {
+    assert(V->getType()->isVectorTy() == PtrSD.getValueType().isVector() &&
+           "IR and SD types disagree");
+    if (!canPassGCPtrOnVReg(PtrSD)) {
       LLVM_DEBUG(dbgs() << "direct/spill "; PtrSD.dump(&Builder.DAG));
       return;
     }
@@ -593,8 +599,12 @@
   };
 
   auto requireSpillSlot = [&](const Value *V) {
-    if (isGCValue(V))
-      return !LowerAsVReg.count(Builder.getValue(V));
+    if (isGCValue(V)) {
+      SDValue SDV = Builder.getValue(V);
+      if (!LoweredGCPtrs.empty())
+        return !LowerAsVReg.count(SDV);
+      return !MaxVRegPtrs || !canPassGCPtrOnVReg(SDV);
+    }
     return !(LiveInDeopt || UseRegistersForDeoptValues);
   };
 


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