[PATCH] D88676: [PPC][AIX] Add vector callee saved registers for AIX extended vector ABI

Wed Oct 7 08:45:55 PDT 2020

Xiangling_L added inline comments.

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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:54
+; MIR64-LABEL:   fixedStack:
+; MIR64-NEXT:    - { id: 0, type: spill-slot, offset: -16, size: 16, alignment: 16, stack-id: default, 
+; MIR64-NEXT:        callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '', 
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minor nit: trailing space on line 54, 55, 57, 58, 60

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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:81
+
+; ASM32:         li {{[0-9]+}}, -192
+; ASM32-DAG:     stxvd2x 52, 1, {{[0-9]+}}                       # 16-byte Folded Spill
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Can we line up all comments?

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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:81
+
+; ASM32:         li {{[0-9]+}}, -192
+; ASM32-DAG:     stxvd2x 52, 1, {{[0-9]+}}                       # 16-byte Folded Spill
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Xiangling_L wrote:
> Can we line up all comments?
I am suggesting to use things like `[[REG1:[0-9]+]]`  to match registers, use `{{[0-9]+}}` to match numerical values if we need to. The same comments apply to all testcases.

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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:120
+; MIR32-LABEL:   fixedStack:
+; MIR32-NEXT:    - { id: 0, type: spill-slot, offset: -144, size: 16, alignment: 16, stack-id: default,
+; MIR32-NEXT:        callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '',
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Thank you for adding this testcase.  I think it would be better if we also test`r13`/`x14`, `f14`, `v20`, then we can observe the padding added in. 

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D88676/new/

https://reviews.llvm.org/D88676