[llvm] 0c009e0 - [Test] Add test showing that we can avoid inserting trunc/zext

[Max Kazantsev via llvm-commits]

Author: Max Kazantsev
Date: 2020-10-07T12:19:01+07:00
New Revision: 0c009e092e29a3dff16c5c0522979341fab3be62

URL: https://github.com/llvm/llvm-project/commit/0c009e092e29a3dff16c5c0522979341fab3be62
DIFF: https://github.com/llvm/llvm-project/commit/0c009e092e29a3dff16c5c0522979341fab3be62.diff

LOG: [Test] Add test showing that we can avoid inserting trunc/zext

Added: 
    

Modified: 
    llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
index d741514fa4fa..da2a2e539379 100644
--- a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
+++ b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
@@ -544,3 +544,55 @@ define i32 @test10(i32 %v) {
   leave:
   ret i32 22
 }
+
+; TODO: We don't really need trunc/zext here because when iv.next overflows,
+; its value is not used.
+define i32 @test11(i32 %start, i32* %p, i32* %q) {
+; CHECK-LABEL: @test11(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT:    [[IV_NEXT:%.*]] = add i32 [[TMP1]], -1
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
+; CHECK-NEXT:    br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
+; CHECK:       backedge:
+; CHECK-NEXT:    [[INDEX:%.*]] = zext i32 [[IV_NEXT]] to i64
+; CHECK-NEXT:    [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT:    store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT:    [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT:    [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT:    [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT:    br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret i32 0
+; CHECK:       failure:
+; CHECK-NEXT:    unreachable
+;
+entry:
+  br label %loop
+
+loop:
+  %iv = phi i32 [%start, %entry], [%iv.next, %backedge]
+  %iv.next = add i32 %iv, -1
+  %cond = icmp eq i32 %iv, 0
+  br i1 %cond, label %exit, label %backedge
+
+backedge:
+  %index = zext i32 %iv.next to i64
+  %store.addr = getelementptr i32, i32* %p, i64 %index
+  store i32 1, i32* %store.addr
+  %load.addr = getelementptr i32, i32* %q, i64 %index
+  %stop = load i32, i32* %q
+  %loop.cond = icmp eq i32 %stop, 0
+  br i1 %loop.cond, label %loop, label %failure
+
+exit:
+  ret i32 0
+
+failure:
+  unreachable
+}