[PATCH] D88858: [AMDGPU] Emit correct kernel descriptor on big-endian hosts
Scott Linder via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 6 10:30:54 PDT 2020
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe4a9e4ef554a: [AMDGPU] Emit correct kernel descriptor on big-endian hosts (authored by scott.linder).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D88858/new/
https://reviews.llvm.org/D88858
Files:
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
llvm/test/MC/AMDGPU/hsa-sgpr-init-bug-v3.s
llvm/test/MC/AMDGPU/hsa-v3.s
Index: llvm/test/MC/AMDGPU/hsa-v3.s
===================================================================
--- llvm/test/MC/AMDGPU/hsa-v3.s
+++ llvm/test/MC/AMDGPU/hsa-v3.s
@@ -3,9 +3,6 @@
// RUN: llvm-readelf -sections -symbols -relocations %t | FileCheck --check-prefix=READOBJ %s
// RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
-// big endian not supported
-// XFAIL: host-byteorder-big-endian
-
// READOBJ: Section Headers
// READOBJ: .text PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9]+}} AX {{[0-9]+}} {{[0-9]+}} 256
// READOBJ: .rodata PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} 000100 {{[0-9]+}} A {{[0-9]+}} {{[0-9]+}} 64
Index: llvm/test/MC/AMDGPU/hsa-sgpr-init-bug-v3.s
===================================================================
--- llvm/test/MC/AMDGPU/hsa-sgpr-init-bug-v3.s
+++ llvm/test/MC/AMDGPU/hsa-sgpr-init-bug-v3.s
@@ -1,9 +1,6 @@
// RUN: llvm-mc -mattr=+code-object-v3 -triple amdgcn-amd-amdhsa -mcpu=gfx802 -filetype=obj < %s > %t
// RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
-// big endian not supported
-// XFAIL: host-byteorder-big-endian
-
// Check that SGPR init bug on gfx803 is corrected by the assembler, setting
// GRANULATED_WAVEFRONT_SGPR_COUNT to 11.
Index: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+++ llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
@@ -656,9 +656,10 @@
KernelCodeSymbol->setVisibility(ELF::STV_PROTECTED);
Streamer.emitLabel(KernelDescriptorSymbol);
- Streamer.emitBytes(StringRef(
- (const char*)&(KernelDescriptor),
- offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset)));
+ Streamer.emitInt32(KernelDescriptor.group_segment_fixed_size);
+ Streamer.emitInt32(KernelDescriptor.private_segment_fixed_size);
+ for (uint8_t Res : KernelDescriptor.reserved0)
+ Streamer.emitInt8(Res);
// FIXME: Remove the use of VK_AMDGPU_REL64 in the expression below. The
// expression being created is:
// (start of kernel code) - (start of kernel descriptor)
@@ -670,11 +671,12 @@
KernelDescriptorSymbol, MCSymbolRefExpr::VK_None, Context),
Context),
sizeof(KernelDescriptor.kernel_code_entry_byte_offset));
- Streamer.emitBytes(StringRef(
- (const char*)&(KernelDescriptor) +
- offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset) +
- sizeof(KernelDescriptor.kernel_code_entry_byte_offset),
- sizeof(KernelDescriptor) -
- offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset) -
- sizeof(KernelDescriptor.kernel_code_entry_byte_offset)));
+ for (uint8_t Res : KernelDescriptor.reserved1)
+ Streamer.emitInt8(Res);
+ Streamer.emitInt32(KernelDescriptor.compute_pgm_rsrc3);
+ Streamer.emitInt32(KernelDescriptor.compute_pgm_rsrc1);
+ Streamer.emitInt32(KernelDescriptor.compute_pgm_rsrc2);
+ Streamer.emitInt16(KernelDescriptor.kernel_code_properties);
+ for (uint8_t Res : KernelDescriptor.reserved2)
+ Streamer.emitInt8(Res);
}
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