[llvm] 2efd9fd - [InstCombine] Add or(shl(v,and(x,bw-1)),lshr(v,bw-and(x,bw-1))) funnel shift tests

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-10-05T17:22:14+01:00
New Revision: 2efd9fd699ed59df2927074f318edac99533e402

URL: https://github.com/llvm/llvm-project/commit/2efd9fd699ed59df2927074f318edac99533e402
DIFF: https://github.com/llvm/llvm-project/commit/2efd9fd699ed59df2927074f318edac99533e402.diff

LOG: [InstCombine] Add or(shl(v,and(x,bw-1)),lshr(v,bw-and(x,bw-1))) funnel shift tests

If we know the shift amount is less than the bitwidth we should be able to convert this to a funnel shift

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/funnel.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/funnel.ll b/llvm/test/Transforms/InstCombine/funnel.ll
index 9adb91b88d7f..f8844519ee74 100644
--- a/llvm/test/Transforms/InstCombine/funnel.ll
+++ b/llvm/test/Transforms/InstCombine/funnel.ll
@@ -182,3 +182,58 @@ define <3 x i36> @fshl_v3i36_constant_nonsplat_undef0(<3 x i36> %x, <3 x i36> %y
   %r = or <3 x i36> %shl, %shr
   ret <3 x i36> %r
 }
+
+; Fold or(shl(x,a),lshr(y,bw-a)) -> fshl(x,y,a) iff a < bw
+
+define i64 @fshl_sub_mask(i64 %x, i64 %y, i64 %a) {
+; CHECK-LABEL: @fshl_sub_mask(
+; CHECK-NEXT:    [[MASK:%.*]] = and i64 [[A:%.*]], 63
+; CHECK-NEXT:    [[SHL:%.*]] = shl i64 [[X:%.*]], [[MASK]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i64 64, [[MASK]]
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i64 [[Y:%.*]], [[SUB]]
+; CHECK-NEXT:    [[R:%.*]] = or i64 [[SHL]], [[SHR]]
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %mask = and i64 %a, 63
+  %shl = shl i64 %x, %mask
+  %sub = sub nuw nsw i64 64, %mask
+  %shr = lshr i64 %y, %sub
+  %r = or i64 %shl, %shr
+  ret i64 %r
+}
+
+; Fold or(lshr(v,a),shl(v,bw-a)) -> fshr(y,x,a) iff a < bw
+
+define i64 @fshr_sub_mask(i64 %x, i64 %y, i64 %a) {
+; CHECK-LABEL: @fshr_sub_mask(
+; CHECK-NEXT:    [[MASK:%.*]] = and i64 [[A:%.*]], 63
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i64 [[X:%.*]], [[MASK]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i64 64, [[MASK]]
+; CHECK-NEXT:    [[SHL:%.*]] = shl i64 [[Y:%.*]], [[SUB]]
+; CHECK-NEXT:    [[R:%.*]] = or i64 [[SHL]], [[SHR]]
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %mask = and i64 %a, 63
+  %shr = lshr i64 %x, %mask
+  %sub = sub nuw nsw i64 64, %mask
+  %shl = shl i64 %y, %sub
+  %r = or i64 %shl, %shr
+  ret i64 %r
+}
+
+define <2 x i64> @fshr_sub_mask_vector(<2 x i64> %x, <2 x i64> %y, <2 x i64> %a) {
+; CHECK-LABEL: @fshr_sub_mask_vector(
+; CHECK-NEXT:    [[MASK:%.*]] = and <2 x i64> [[A:%.*]], <i64 63, i64 63>
+; CHECK-NEXT:    [[SHR:%.*]] = lshr <2 x i64> [[X:%.*]], [[MASK]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw <2 x i64> <i64 64, i64 64>, [[MASK]]
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i64> [[Y:%.*]], [[SUB]]
+; CHECK-NEXT:    [[R:%.*]] = or <2 x i64> [[SHL]], [[SHR]]
+; CHECK-NEXT:    ret <2 x i64> [[R]]
+;
+  %mask = and <2 x i64> %a, <i64 63, i64 63>
+  %shr = lshr <2 x i64> %x, %mask
+  %sub = sub nuw nsw <2 x i64> <i64 64, i64 64>, %mask
+  %shl = shl <2 x i64> %y, %sub
+  %r = or <2 x i64> %shl, %shr
+  ret <2 x i64> %r
+}