[PATCH] D88570: [SDag] SimplifyDemandedBits: simplify to FP constant if all bits known

Mon Oct 5 03:07:34 PDT 2020

foad added a reviewer: t.p.northover.
foad added a comment.
Herald added a subscriber: pengfei.

This looks like a clear win to me on all the affected test cases except for one slight regression noted inline.

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Comment at: llvm/test/CodeGen/ARM/fcopysign.ll:98-100
+; HARD-NEXT:    vmov.i32 d18, #0x3f000000
+; HARD-NEXT:    vorr d1, d17, d17
+; HARD-NEXT:    vbsl d1, d16, d18
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I'm not an ARM expert but this slight regression looks like it's just bad luck in the register allocator. If the vmov went into d1 then we could use vbit instead of vorr+vbsl.

Repository:
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  https://reviews.llvm.org/D88570/new/

https://reviews.llvm.org/D88570