[PATCH] D87976: Support the division-by-constant strength reduction for more integer types

[Simonas Kazlauskas via Phabricator via llvm-commits]

nagisa added inline comments.
Herald added a subscriber: pengfei.


================
Comment at: llvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll:207
+; CHECK-NEXT:    cset w0, eq
 ; CHECK-NEXT:    ret
   %urem = urem i16 %X, 3
----------------
efriedma wrote:
> Any idea what's going on here?
Good catch.

With the old code the `urem` gets promoted to i32 first, which AFAICT then allows some other validity check pass in the `SimplifySetCC` (which doesn't otherwise work for i16/i8), and thus apply 

```
(seteq/ne (urem N, D), 0) -> (setule/ugt (rotr (mul N, P), K), Q)
```

anyway. With the adjusted `BuildUDIV` the multiply-shift reduction manages to get applied before `urem i16` gets promoted to `urem i32`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87976/new/

https://reviews.llvm.org/D87976