[llvm] 4b38ceb - [X86] Remove MWAITX_SAVE_EBX pseudo instruction. Always save/restore the full %rbx register even in gnux32.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 4 17:11:49 PDT 2020
Author: Craig Topper
Date: 2020-10-04T16:28:15-07:00
New Revision: 4b38ceb0ebd7ed5fe1d5cbaf981060227515fb6e
URL: https://github.com/llvm/llvm-project/commit/4b38ceb0ebd7ed5fe1d5cbaf981060227515fb6e
DIFF: https://github.com/llvm/llvm-project/commit/4b38ceb0ebd7ed5fe1d5cbaf981060227515fb6e.diff
LOG: [X86] Remove MWAITX_SAVE_EBX pseudo instruction. Always save/restore the full %rbx register even in gnux32.
ebx/rbx only needs to be saved when 64-bit registers are supported
anyway. It should be fine to save/restore the whole rbx register
even in gnux32 where the base is technically just ebx.
This matches what we do for cmpxchg16b where rbx is saved/restored
regardless of gnux32.
Added:
Modified:
llvm/lib/Target/X86/X86ExpandPseudo.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrCompiler.td
llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
index a07e165633bb..7a593b8ff709 100644
--- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp
+++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
@@ -442,7 +442,6 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
MBB.erase(MBBI);
return true;
}
- case X86::MWAITX_SAVE_EBX:
case X86::MWAITX_SAVE_RBX: {
// Perform the following transformation.
// SaveRbx = pseudomwaitx InArg, SaveRbx
@@ -458,9 +457,7 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
BuildMI(MBB, MBBI, DL, TII->get(X86::MWAITXrrr));
// Finally, restore the value of RBX.
Register SaveRbx = MBBI->getOperand(2).getReg();
- unsigned BasePointer = Opcode == X86::MWAITX_SAVE_EBX ? X86::EBX : X86::RBX;
- TII->copyPhysReg(MBB, MBBI, DL, BasePointer, SaveRbx,
- /*SrcIsKill*/ true);
+ TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, /*SrcIsKill*/ true);
// Delete the pseudo.
MBBI->eraseFromParent();
return true;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9b5412c945ff..47aad8965e1c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -33793,7 +33793,7 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
Register BasePtr = TRI->getBaseRegister();
bool IsRBX = (BasePtr == X86::RBX || BasePtr == X86::EBX);
// If no need to save the base pointer, we generate MWAITXrrr,
- // else we generate pseudo MWAITX_SAVE_RBX/EBX.
+ // else we generate pseudo MWAITX_SAVE_RBX.
if (!IsRBX || !TRI->hasBasePointer(*MF)) {
BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), X86::ECX)
.addReg(MI.getOperand(0).getReg());
@@ -33812,17 +33812,15 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
.addReg(MI.getOperand(0).getReg());
BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), X86::EAX)
.addReg(MI.getOperand(1).getReg());
- const TargetRegisterClass *RegClass =
- BasePtr == X86::EBX ? &X86::GR32RegClass : &X86::GR64RegClass;
- // Save RBX (or EBX) into a virtual register.
- Register SaveRBX = MF->getRegInfo().createVirtualRegister(RegClass);
+ assert(Subtarget.is64Bit() && "Expected 64-bit mode!");
+ // Save RBX into a virtual register.
+ Register SaveRBX =
+ MF->getRegInfo().createVirtualRegister(&X86::GR64RegClass);
BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), SaveRBX)
- .addReg(BasePtr);
+ .addReg(X86::RBX);
// Generate mwaitx pseudo.
- unsigned Opcode =
- BasePtr == X86::RBX ? X86::MWAITX_SAVE_RBX : X86::MWAITX_SAVE_EBX;
- Register Dst = MF->getRegInfo().createVirtualRegister(RegClass);
- BuildMI(*BB, MI, DL, TII->get(Opcode))
+ Register Dst = MF->getRegInfo().createVirtualRegister(&X86::GR64RegClass);
+ BuildMI(*BB, MI, DL, TII->get(X86::MWAITX_SAVE_RBX))
.addDef(Dst) // Destination tied in with SaveRBX.
.addReg(MI.getOperand(2).getReg()) // input value of EBX.
.addUse(SaveRBX); // Save of base pointer.
diff --git a/llvm/lib/Target/X86/X86InstrCompiler.td b/llvm/lib/Target/X86/X86InstrCompiler.td
index 0f78b7d35aa6..c20a2b88e118 100644
--- a/llvm/lib/Target/X86/X86InstrCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrCompiler.td
@@ -896,19 +896,9 @@ def LCMPXCHG16B_SAVE_RBX :
GR64:$rbx_save))]>;
}
-// This pseudo must be used when the frame uses RBX as
+// This pseudo must be used when the frame uses RBX/EBX as
// the base pointer.
-// cf comment for LCMPXCHG8B_SAVE_EBX.
-let Defs = [EBX], Uses = [ECX, EAX, EBX],
- Predicates = [HasMWAITX], SchedRW = [WriteSystem],
- isCodeGenOnly = 1, isPseudo = 1, Constraints = "$ebx_save = $dst" in {
-def MWAITX_SAVE_EBX :
- I<0, Pseudo, (outs GR32:$dst),
- (ins GR32:$ebx_input, GR32:$ebx_save),
- "mwaitx",
- []>;
-}
-// Same as MWAITX_SAVE_EBX but for the case where RBX is the base pointer.
+// cf comment for LCMPXCHG16B_SAVE_RBX.
let Defs = [EBX], Uses = [ECX, EAX, EBX],
Predicates = [HasMWAITX], SchedRW = [WriteSystem],
isCodeGenOnly = 1, isPseudo = 1, Constraints = "$rbx_save = $dst" in {
diff --git a/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll b/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
index fead4c650c0a..55fd730375e2 100644
--- a/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
+++ b/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
@@ -42,12 +42,12 @@ entry:
; USE_BASE_32: movl %ecx, %eax
; USE_BASE_32: movl %edx, %ecx
; Save base pointer.
-; USE_BASE_32: movl %ebx, [[SAVE_ebx:%e(di|si)]]
+; USE_BASE_32: movq %rbx, [[SAVE_rbx:%r(di|si)]]
; Set mwaitx ebx argument.
; USE_BASE_32: movl %r8d, %ebx
; USE_BASE_32-NEXT: mwaitx
; Restore base pointer.
-; USE_BASE_32-NEXT: movl [[SAVE_ebx]], %ebx
+; USE_BASE_32-NEXT: movq [[SAVE_rbx]], %rbx
; Pass mwaitx 3 arguments in eax, ecx, ebx
; NO_BASE_64: movl %r8d, %ebx
@@ -111,12 +111,12 @@ if.end:
; USE_BASE_32: movl %esi, %eax
; USE_BASE_32: movl %edi, %ecx
; Save base pointer.
-; USE_BASE_32: movl %ebx, [[SAVE_ebx:%e(di|si)]]
+; USE_BASE_32: movq %rbx, [[SAVE_rbx:%r(di|si)]]
; Set mwaitx ebx argument.
; USE_BASE_32: movl %edx, %ebx
; USE_BASE_32-NEXT: mwaitx
; Restore base pointer.
-; USE_BASE_32-NEXT: movl [[SAVE_ebx]], %ebx
+; USE_BASE_32-NEXT: movq [[SAVE_rbx]], %rbx
; Pass mwaitx 3 arguments in eax, ecx, ebx
; NO_BASE_64: movl %edx, %ebx
@@ -179,12 +179,12 @@ if.end:
; USE_BASE_32: movl %esi, %eax
; USE_BASE_32: movl %edi, %ecx
; Save base pointer.
-; USE_BASE_32: movl %ebx, [[SAVE_ebx:%e(di|si)]]
+; USE_BASE_32: movq %rbx, [[SAVE_rbx:%r(di|si)]]
; Set mwaitx ebx argument.
; USE_BASE_32: movl %edx, %ebx
; USE_BASE_32-NEXT: mwaitx
; Restore base pointer.
-; USE_BASE_32-NEXT: movl [[SAVE_ebx]], %ebx
+; USE_BASE_32-NEXT: movq [[SAVE_rbx]], %rbx
; Pass mwaitx 3 arguments in eax, ecx, ebx
; NO_BASE_64: movl %edx, %ebx
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