[PATCH] D88201: [DAGCombiner] Add decomposition patterns for Mul-by-Imm.
EsmeYi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 4 10:21:43 PDT 2020
Esme added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:16061
+ int64_t Imm = ConstNode->getSExtValue();
+ unsigned Shift = countTrailingZeros<uint64_t>(Imm);
+ Imm >>= Shift;
----------------
spatel wrote:
> Just to confirm: no target besides PPC is going to see any diffs from this patch because they don't check the constant for trailing zeros yet?
>
> (We really should implement the `TODO` from the DAGCombiner code comment, so every target doesn't have to duplicate this logic.)
Thanks for your comments. @spatel
1. Yes, RISCV and X86 implemented the hook `decomposeMulByConstant` and both of them don't check the constant for trailing zeros, therefore they will never return true for these constants. So yes, this patch has no effect on targets other than PPC.
2. I will look into the `TODO` after my vacation (Oct 9). :D
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D88201/new/
https://reviews.llvm.org/D88201
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