[PATCH] D88663: [AArch64] Use TargetRegisterClass::hasSubClassEq in tryToFindRegisterToRename

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 2 11:25:05 PDT 2020


efriedma added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir:260
 # CHECK-NEXT:    renamable $x8 = MRS 55840
-# CHECK-NEXT:    STPWi $w9, killed renamable $w8, killed renamable $x0, 0 :: (store 4)
+# CHECK-NEXT:    STPWi $w2, killed renamable $w8, killed renamable $x0, 0 :: (store 4)
 # CHECK-NEXT:    RET undef $lr
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This seems wrong: we shouldn't skip renaming implicit defs.  Probably we should bail out of the transform if we see an implicit def we can't understand.

The test input is a little weird, though; I'm not sure it's legal to mark the result of the ORRWrs renamable given the relationship between the result and the implicit def.


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  https://reviews.llvm.org/D88663/new/

https://reviews.llvm.org/D88663



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