[PATCH] D88742: [AArch64] Identify SAD pattern for v16i8 type
Vinay Madhusudan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 2 09:04:09 PDT 2020
mivnay created this revision.
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
mivnay requested review of this revision.
(ABS (SUB (ZERO_EXTEND a), (ZERO_EXTEND b))) to ZERO_EXTEND((UABD a, b))
This partially solves the bug: https://bugs.llvm.org/show_bug.cgi?id=46888
Meta ticket: https://bugs.llvm.org/show_bug.cgi?id=46929
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D88742
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/arm64-vabs.ll
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