[PATCH] D87836: [ARM] Fold select_cc(vecreduce_[u|s][min|max], x) into VMINV or VMAXV
Sam Tebbs via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 2 06:52:15 PDT 2020
samtebbs added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:12112
+ SDValue FalseVal;
+ if (N->getOpcode() == ISD::SELECT) {
+ SetCC = N->getOperand(0);
----------------
dmgreen wrote:
> I think it needs to check that operand is a Setcc too, to be sure it's not something strange.
Good idea.
================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:12185
+ if (VectorScalarType != MVT::i32)
+ LHS = DCI.DAG.getNode(IsUnsigned ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND, dl,
+ MVT::i32, LHS, DCI.DAG.getValueType(LeftType));
----------------
dmgreen wrote:
> The top bits of this are not read by the instruction. Can we change it to an ANY_EXTEND?
Sure.
================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:12186
+ LHS = DCI.DAG.getNode(IsUnsigned ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND, dl,
+ MVT::i32, LHS, DCI.DAG.getValueType(LeftType));
+
----------------
dmgreen wrote:
> I think the last operand isn't needed here.
You are indeed correct.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D87836/new/
https://reviews.llvm.org/D87836
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