[PATCH] D88706: [OpenMP][MLIR] WIP : Fix for nested parallel region
Kiran Chandramohan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 2 01:05:01 PDT 2020
kiranchandramohan added a comment.
Thanks @fghanim for the review. While debugging the nested parallel region issues, we saw some difference between where the allocas are placed by the OpenMP IRBuilder in the clang usage and the MLIR usage. Moving to the version where the OpenMP IRBuilder maintains allocaIP fixed the difference. In MLIR module translation there is no alloca insertion point. So what we can provide as allocaIP is the current insertionPoint. Is that OK? What is the allocaIP used for? Why do we need a separate allocaIP, why cannot we treat it like a normal instruction? Is it because all alloca instructions should be together at the top of the function? The langref for alloca did not have such a requirement.
I have created another review without the alloca changes and that also works correctly for the nested parallel case.
https://reviews.llvm.org/D88720
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D88706/new/
https://reviews.llvm.org/D88706
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