[PATCH] D88577: [AArch64] Generate dot for v16i8 sum reduction to i32
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 2 00:29:30 PDT 2020
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
Thanks. LGTM with one minor modification.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10966
+ SDValue Zeros =
+ DAG.getConstant(0, DL, EVT::getVectorVT(*DAG.getContext(), MVT::i32, 4));
+ auto DotIntrisic = (ExtOpcode == ISD::ZERO_EXTEND)
----------------
EVT::getVectorVT(*DAG.getContext(), MVT::i32, 4) -> MVT::v4i32 :)
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D88577/new/
https://reviews.llvm.org/D88577
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