[PATCH] D88676: [PPC][AIX] Add vector callee saved registers for AIX extended vector ABI

Thu Oct 1 10:37:04 PDT 2020

sfertile added a subscriber: DiggerLin.
sfertile added inline comments.

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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:2
+; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -verify-machineinstrs \
+; RUN: -mcpu=pwr7 -mattr=+altivec -stop-after=prologepilog < %s | \
+; RUN: FileCheck --check-prefix=MIR32 %s
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Minor nit: align this with the first argument in the preceeding line.

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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:3
+; RUN: -mcpu=pwr7 -mattr=+altivec -stop-after=prologepilog < %s | \
+; RUN: FileCheck --check-prefix=MIR32 %s
+
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 I'm not sure the formatting we have adopted for the tests, but I think subsequent commands were to be indented by 2? @Xiangling_L or @DiggerLin  might know better, I think it was on one of their reviews where I saw it mentioned.

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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-vector.ll:19
+entry:
+  call void asm sideeffect "", "~{v13},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
+  ret void
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A couple minor suggestions

1) Use only 2 or 3 callee saved vector registers as clobbers. It will show how we  allocate stack space to store all vector registers from N to 31 where N is the lowest used csr vr, and make the test a bit more concise. 
2) Have V12 as a clobber to show that it is not callee saved.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88676/new/

https://reviews.llvm.org/D88676