[llvm] e20f459 - [AMDGPU] Simplify getNumFlatOffsetBits. NFC.

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2020-10-01T15:24:09+01:00
New Revision: e20f4592297ba44644a8ec75b9d182a903cc0df3

URL: https://github.com/llvm/llvm-project/commit/e20f4592297ba44644a8ec75b9d182a903cc0df3
DIFF: https://github.com/llvm/llvm-project/commit/e20f4592297ba44644a8ec75b9d182a903cc0df3.diff

LOG: [AMDGPU] Simplify getNumFlatOffsetBits. NFC.

Remove some checks that have already been done in the only caller.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    llvm/lib/Target/AMDGPU/SIInstrInfo.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 5dd42d1f4a6a..8915ef8b63cc 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -1712,7 +1712,7 @@ bool AMDGPUDAGToDAGISel::SelectFlatOffset(SDNode *N,
         SDLoc DL(N);
         uint64_t RemainderOffset = COffsetVal;
         uint64_t ImmField = 0;
-        const unsigned NumBits = TII->getNumFlatOffsetBits(AS, IsSigned);
+        const unsigned NumBits = TII->getNumFlatOffsetBits(IsSigned);
         if (IsSigned) {
           // Use signed division by a power of two to truncate towards 0.
           int64_t D = 1LL << (NumBits - 1);

diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 8f67c2a0bbdf..abf6869fee15 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6893,14 +6893,7 @@ bool SIInstrInfo::isBufferSMRD(const MachineInstr &MI) const {
   return RI.getRegClass(RCID)->hasSubClassEq(&AMDGPU::SGPR_128RegClass);
 }
 
-unsigned SIInstrInfo::getNumFlatOffsetBits(unsigned AddrSpace,
-                                           bool Signed) const {
-  if (!ST.hasFlatInstOffsets())
-    return 0;
-
-  if (ST.hasFlatSegmentOffsetBug() && AddrSpace == AMDGPUAS::FLAT_ADDRESS)
-    return 0;
-
+unsigned SIInstrInfo::getNumFlatOffsetBits(bool Signed) const {
   if (ST.getGeneration() >= AMDGPUSubtarget::GFX10)
     return Signed ? 12 : 11;
 

diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 8149c47504c6..8ce41c4ba8b3 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1016,7 +1016,7 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
     return isUInt<12>(Imm);
   }
 
-  unsigned getNumFlatOffsetBits(unsigned AddrSpace, bool Signed) const;
+  unsigned getNumFlatOffsetBits(bool Signed) const;
 
   /// Returns if \p Offset is legal for the subtarget as the offset to a FLAT
   /// encoded instruction. If \p Signed, this is for an instruction that