[PATCH] D88653: [ARM] Fix pointer offset when splitting stores from VMOVDRR

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: efriedma, simon_tatham, ostannard, john.brawn.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
dmgreen requested review of this revision.

We were not accounting for the pointer offset when splitting a load from a VMOVDRR node, which could lead to incorrect aliasing info. In this case it is the fneg via integer arithmetic that gives us a store->load pair that we started getting wrong.


https://reviews.llvm.org/D88653

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/Thumb2/vmovdrroffset.ll


Index: llvm/test/CodeGen/Thumb2/vmovdrroffset.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/vmovdrroffset.ll
+++ llvm/test/CodeGen/Thumb2/vmovdrroffset.ll
@@ -21,9 +21,9 @@
 ; CHECK-NEXT:    vmov r2, r3, d8
 ; CHECK-NEXT:    vmov r0, r1, d0
 ; CHECK-NEXT:    bl __aeabi_dadd
+; CHECK-NEXT:    str r1, [sp, #4]
 ; CHECK-NEXT:    mov r4, r0
 ; CHECK-NEXT:    ldrb.w r0, [sp, #7]
-; CHECK-NEXT:    str r1, [sp, #4]
 ; CHECK-NEXT:    eor r0, r0, #128
 ; CHECK-NEXT:    strb.w r0, [sp, #7]
 ; CHECK-NEXT:    vmov r0, r1, d9
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -14553,7 +14553,7 @@
                                     DAG.getConstant(4, DL, MVT::i32));
     return DAG.getStore(NewST1.getValue(0), DL,
                         StVal.getNode()->getOperand(isBigEndian ? 0 : 1),
-                        OffsetPtr, St->getPointerInfo(),
+                        OffsetPtr, St->getPointerInfo().getWithOffset(4),
                         std::min(4U, St->getAlignment() / 2),
                         St->getMemOperand()->getFlags());
   }


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