[PATCH] D88577: [AArch64] Generate udot for v16i8 sum reduction to i32

Thu Oct 1 02:54:27 PDT 2020

dmgreen added a comment.

Hello

Can you update with full context? -U999999. It makes phabriactor reviews easier to follow.

I had thought about this somewhat in reference to inloop reductions. I had presumed that it would need some form of partial reduction though, as you would want part of the reduction would then happen outside the loop (I think)

Improving codegen on it's own is good, but I'm interested in seeing how this fits with the other patches.

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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10970
+  MachineSDNode *ABD =
+      DAG.getMachineNode(AArch64::UDOTv16i8, SDLoc(Op0), Zeros.getValueType(),
+                         Zeros, Ones, Op0.getOperand(0));
----------------
We ideally shouldn't be just producing a machine node here. Can you add a AArch64ISD::UDOT node?

We should be doing the same for SDOT too.

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D88577/new/

https://reviews.llvm.org/D88577