[compiler-rt] de973e0 - [RISCV][ASAN] implementation for previous/next pc routines for riscv64
via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 30 22:15:04 PDT 2020
Author: Igor Chervatyuk
Date: 2020-10-01T08:14:44+03:00
New Revision: de973e0b07207a22d5ca04fd56fad6a40ced4172
URL: https://github.com/llvm/llvm-project/commit/de973e0b07207a22d5ca04fd56fad6a40ced4172
DIFF: https://github.com/llvm/llvm-project/commit/de973e0b07207a22d5ca04fd56fad6a40ced4172.diff
LOG: [RISCV][ASAN] implementation for previous/next pc routines for riscv64
[7/11] patch series to port ASAN for riscv64
Depends On D87575
Reviewed By: eugenis, vitalybuka, luismarques
Differential Revision: https://reviews.llvm.org/D87577
Added:
Modified:
compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp
compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
Removed:
################################################################################
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp b/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp
index ef14fb704eed..ca2f90a51c9e 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.cpp
@@ -21,6 +21,28 @@ uptr StackTrace::GetNextInstructionPc(uptr pc) {
return pc + 8;
#elif defined(__powerpc__) || defined(__arm__) || defined(__aarch64__)
return pc + 4;
+#elif SANITIZER_RISCV64
+ // Current check order is 4 -> 2 -> 6 -> 8
+ u8 InsnByte = *(u8 *)(pc);
+ if (((InsnByte & 0x3) == 0x3) && ((InsnByte & 0x1c) != 0x1c)) {
+ // xxxxxxxxxxxbbb11 | 32 bit | bbb != 111
+ return pc + 4;
+ }
+ if ((InsnByte & 0x3) != 0x3) {
+ // xxxxxxxxxxxxxxaa | 16 bit | aa != 11
+ return pc + 2;
+ }
+ // RISC-V encoding allows instructions to be up to 8 bytes long
+ if ((InsnByte & 0x3f) == 0x1f) {
+ // xxxxxxxxxx011111 | 48 bit |
+ return pc + 6;
+ }
+ if ((InsnByte & 0x7f) == 0x3f) {
+ // xxxxxxxxx0111111 | 64 bit |
+ return pc + 8;
+ }
+ // bail-out if could not figure out the instruction size
+ return 0;
#else
return pc + 1;
#endif
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h b/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
index 4162b58a867d..9111acce0c60 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
@@ -85,6 +85,14 @@ uptr StackTrace::GetPreviousInstructionPc(uptr pc) {
return pc - 4;
#elif defined(__sparc__) || defined(__mips__)
return pc - 8;
+#elif SANITIZER_RISCV64
+ // RV-64 has variable instruciton length...
+ // C extentions gives us 2-byte instructoins
+ // RV-64 has 4-byte instructions
+ // + RISCV architecture allows instructions up to 8 bytes
+ // It seems
diff icult to figure out the exact instruction length -
+ // pc - 2 seems like a safe option for the purposes of stack tracing
+ return pc - 2;
#else
return pc - 1;
#endif
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