[PATCH] D87543: AMDGPU: Always split si_end_cf blocks

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D87543#2303616 <https://reviews.llvm.org/D87543#2303616>, @nhaehnle wrote:

>> I'm not trying to fully solve the live range splitting problem greedy regalloc hits. I'm trying to eliminate the isBasicBlockPrologue concept that fastregalloc trips over when inserting spills at the beginning of the block
>
> What if the concept of a basic block prolog *is* the correct long term solution?

I don't think it is a well formed concept. The operations the prolog inputs depend on transitively turn into prolog instructions, which generally breaks down.


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