[PATCH] D87046: [PPC] Do not emit extswsli in 32BIT mode when using -mcpu=pwr9
Zarko Todorovski via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 30 07:56:17 PDT 2020
ZarkoCA updated this revision to Diff 295287.
ZarkoCA edited the summary of this revision.
ZarkoCA added a comment.
Used REG variables in 64Bit part of test case.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D87046/new/
https://reviews.llvm.org/D87046
Files:
llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll
Index: llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll
+++ llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll
@@ -23,8 +23,6 @@
; 32BIT-DAG: stw [[REG5]], 0([[REG6]])
; 32BIT: blr
-; 64BIT: extswsli [[REG1:[0-9]+]], {{[0-9]+}}, 8
-; 64BIT-NEXT: std [[REG1]], 0({{[0-9]+}})
+; 64BIT: extswsli [[REG1:[0-9]+]], [[REG2:[0-9]+]], 8
+; 64BIT-NEXT: std [[REG1]], 0([[REG3:[0-9]+]])
; 64BIT-NEXT: blr
-
-
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