[PATCH] D87502: [DAGCombiner] Use known bits to fold extract_vector_elt with const index
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 30 07:15:20 PDT 2020
foad added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:17887
+ APInt DemandedElts = APInt::getOneBitSet(NumElts, IndexC->getZExtValue());
+ KnownBits Known = DAG.computeKnownBits(VecOp, DemandedElts);
+ if (Known.isConstant()) {
----------------
RKSimon wrote:
> Would this be better handled by SimplifyDemandedBits?
Good idea. D88569, D88570.
================
Comment at: llvm/test/CodeGen/X86/vector-trunc-math.ll:2713
; SSE-NEXT: packuswb %xmm1, %xmm0
+; SSE-NEXT: pand {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
----------------
foad wrote:
> foad wrote:
> > Regression. Perhaps we need better known bits analysis.
> D87912 is my attempt at fixing this.
This regression got fixed by D88225.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D87502/new/
https://reviews.llvm.org/D87502
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