[llvm] 7fcad55 - [InstCombine] Remove %tmp variable names from bswap tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 30 06:44:29 PDT 2020
Author: Simon Pilgrim
Date: 2020-09-30T14:44:15+01:00
New Revision: 7fcad5583a12026ce19afe487681753ac633064a
URL: https://github.com/llvm/llvm-project/commit/7fcad5583a12026ce19afe487681753ac633064a
DIFF: https://github.com/llvm/llvm-project/commit/7fcad5583a12026ce19afe487681753ac633064a.diff
LOG: [InstCombine] Remove %tmp variable names from bswap tests
Appease update_test_checks script that was complaining about potential %TMP clashes
Added:
Modified:
llvm/test/Transforms/InstCombine/bswap.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/bswap.ll b/llvm/test/Transforms/InstCombine/bswap.ll
index d04262b8e055..965f149b6d95 100644
--- a/llvm/test/Transforms/InstCombine/bswap.ll
+++ b/llvm/test/Transforms/InstCombine/bswap.ll
@@ -5,95 +5,95 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3
define i32 @test1(i32 %i) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.bswap.i32(i32 [[I:%.*]])
-; CHECK-NEXT: ret i32 [[TMP12]]
+; CHECK-NEXT: [[T12:%.*]] = call i32 @llvm.bswap.i32(i32 [[I:%.*]])
+; CHECK-NEXT: ret i32 [[T12]]
;
- %tmp1 = lshr i32 %i, 24
- %tmp3 = lshr i32 %i, 8
- %tmp4 = and i32 %tmp3, 65280
- %tmp5 = or i32 %tmp1, %tmp4
- %tmp7 = shl i32 %i, 8
- %tmp8 = and i32 %tmp7, 16711680
- %tmp9 = or i32 %tmp5, %tmp8
- %tmp11 = shl i32 %i, 24
- %tmp12 = or i32 %tmp9, %tmp11
- ret i32 %tmp12
+ %t1 = lshr i32 %i, 24
+ %t3 = lshr i32 %i, 8
+ %t4 = and i32 %t3, 65280
+ %t5 = or i32 %t1, %t4
+ %t7 = shl i32 %i, 8
+ %t8 = and i32 %t7, 16711680
+ %t9 = or i32 %t5, %t8
+ %t11 = shl i32 %i, 24
+ %t12 = or i32 %t9, %t11
+ ret i32 %t12
}
define i32 @test2(i32 %arg) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.bswap.i32(i32 [[ARG:%.*]])
-; CHECK-NEXT: ret i32 [[TMP14]]
+; CHECK-NEXT: [[T14:%.*]] = call i32 @llvm.bswap.i32(i32 [[ARG:%.*]])
+; CHECK-NEXT: ret i32 [[T14]]
;
- %tmp2 = shl i32 %arg, 24
- %tmp4 = shl i32 %arg, 8
- %tmp5 = and i32 %tmp4, 16711680
- %tmp6 = or i32 %tmp2, %tmp5
- %tmp8 = lshr i32 %arg, 8
- %tmp9 = and i32 %tmp8, 65280
- %tmp10 = or i32 %tmp6, %tmp9
- %tmp12 = lshr i32 %arg, 24
- %tmp14 = or i32 %tmp10, %tmp12
- ret i32 %tmp14
+ %t2 = shl i32 %arg, 24
+ %t4 = shl i32 %arg, 8
+ %t5 = and i32 %t4, 16711680
+ %t6 = or i32 %t2, %t5
+ %t8 = lshr i32 %arg, 8
+ %t9 = and i32 %t8, 65280
+ %t10 = or i32 %t6, %t9
+ %t12 = lshr i32 %arg, 24
+ %t14 = or i32 %t10, %t12
+ ret i32 %t14
}
define i16 @test3(i16 %s) {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[S:%.*]])
-; CHECK-NEXT: ret i16 [[TMP5]]
+; CHECK-NEXT: [[T5:%.*]] = call i16 @llvm.bswap.i16(i16 [[S:%.*]])
+; CHECK-NEXT: ret i16 [[T5]]
;
- %tmp2 = lshr i16 %s, 8
- %tmp4 = shl i16 %s, 8
- %tmp5 = or i16 %tmp2, %tmp4
- ret i16 %tmp5
+ %t2 = lshr i16 %s, 8
+ %t4 = shl i16 %s, 8
+ %t5 = or i16 %t2, %t4
+ ret i16 %t5
}
define i16 @test4(i16 %s) {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[S:%.*]])
-; CHECK-NEXT: ret i16 [[TMP5]]
+; CHECK-NEXT: [[T5:%.*]] = call i16 @llvm.bswap.i16(i16 [[S:%.*]])
+; CHECK-NEXT: ret i16 [[T5]]
;
- %tmp2 = lshr i16 %s, 8
- %tmp4 = shl i16 %s, 8
- %tmp5 = or i16 %tmp4, %tmp2
- ret i16 %tmp5
+ %t2 = lshr i16 %s, 8
+ %t4 = shl i16 %s, 8
+ %t5 = or i16 %t4, %t2
+ ret i16 %t5
}
define i16 @test5(i16 %a) {
; CHECK-LABEL: @test5(
-; CHECK-NEXT: [[TMP_UPGRD_3:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
-; CHECK-NEXT: ret i16 [[TMP_UPGRD_3]]
-;
- %tmp = zext i16 %a to i32
- %tmp1 = and i32 %tmp, 65280
- %tmp2 = ashr i32 %tmp1, 8
- %tmp2.upgrd.1 = trunc i32 %tmp2 to i16
- %tmp4 = and i32 %tmp, 255
- %tmp5 = shl i32 %tmp4, 8
- %tmp5.upgrd.2 = trunc i32 %tmp5 to i16
- %tmp.upgrd.3 = or i16 %tmp2.upgrd.1, %tmp5.upgrd.2
- %tmp6 = bitcast i16 %tmp.upgrd.3 to i16
- %tmp6.upgrd.4 = zext i16 %tmp6 to i32
- %retval = trunc i32 %tmp6.upgrd.4 to i16
+; CHECK-NEXT: [[T_UPGRD_3:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
+; CHECK-NEXT: ret i16 [[T_UPGRD_3]]
+;
+ %t = zext i16 %a to i32
+ %t1 = and i32 %t, 65280
+ %t2 = ashr i32 %t1, 8
+ %t2.upgrd.1 = trunc i32 %t2 to i16
+ %t4 = and i32 %t, 255
+ %t5 = shl i32 %t4, 8
+ %t5.upgrd.2 = trunc i32 %t5 to i16
+ %t.upgrd.3 = or i16 %t2.upgrd.1, %t5.upgrd.2
+ %t6 = bitcast i16 %t.upgrd.3 to i16
+ %t6.upgrd.4 = zext i16 %t6 to i32
+ %retval = trunc i32 %t6.upgrd.4 to i16
ret i16 %retval
}
; PR2842
define i32 @test6(i32 %x) nounwind readnone {
; CHECK-LABEL: @test6(
-; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.bswap.i32(i32 [[X:%.*]])
-; CHECK-NEXT: ret i32 [[TMP7]]
+; CHECK-NEXT: [[T7:%.*]] = call i32 @llvm.bswap.i32(i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[T7]]
;
- %tmp = shl i32 %x, 16
+ %t = shl i32 %x, 16
%x.mask = and i32 %x, 65280
- %tmp1 = lshr i32 %x, 16
- %tmp2 = and i32 %tmp1, 255
- %tmp3 = or i32 %x.mask, %tmp
- %tmp4 = or i32 %tmp3, %tmp2
- %tmp5 = shl i32 %tmp4, 8
- %tmp6 = lshr i32 %x, 24
- %tmp7 = or i32 %tmp5, %tmp6
- ret i32 %tmp7
+ %t1 = lshr i32 %x, 16
+ %t2 = and i32 %t1, 255
+ %t3 = or i32 %x.mask, %t
+ %t4 = or i32 %t3, %t2
+ %t5 = shl i32 %t4, 8
+ %t6 = lshr i32 %x, 24
+ %t7 = or i32 %t5, %t6
+ ret i32 %t7
}
declare void @extra_use(i32)
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