[PATCH] D88505: [InstCombine] ease alignment restriction for converting masked load to normal load
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 29 12:26:33 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0527c8749b90: [InstCombine] ease alignment restriction for converting masked load to normal… (authored by spatel).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D88505/new/
https://reviews.llvm.org/D88505
Files:
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/test/Transforms/InstCombine/masked_intrinsics.ll
Index: llvm/test/Transforms/InstCombine/masked_intrinsics.ll
===================================================================
--- llvm/test/Transforms/InstCombine/masked_intrinsics.ll
+++ llvm/test/Transforms/InstCombine/masked_intrinsics.ll
@@ -100,8 +100,9 @@
; CHECK-LABEL: @load_speculative_less_aligned(
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
-; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
-; CHECK-NEXT: ret <2 x double> [[RES]]
+; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
;
%ptv1 = insertelement <2 x double> undef, double %pt, i64 0
%ptv2 = insertelement <2 x double> %ptv1, double %pt, i64 1
Index: llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -289,9 +289,8 @@
// If we can unconditionally load from this address, replace with a
// load/select idiom. TODO: use DT for context sensitive query
- if (isDereferenceableAndAlignedPointer(LoadPtr, II.getType(), Alignment,
- II.getModule()->getDataLayout(), &II,
- nullptr)) {
+ if (isDereferenceablePointer(LoadPtr, II.getType(),
+ II.getModule()->getDataLayout(), &II, nullptr)) {
Value *LI = Builder.CreateAlignedLoad(II.getType(), LoadPtr, Alignment,
"unmaskedload");
return Builder.CreateSelect(II.getArgOperand(2), LI, II.getArgOperand(3));
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