[PATCH] D87236: [X86][SSE2] Use smarter instruction patterns for lowering UMIN/UMAX with v8i16 and SMIN/SMAX with v16i8.

[Tom Hender via Phabricator via llvm-commits]

TomHender marked an inline comment as done.
TomHender added a comment.

Thank you for your comments.

I am not sure what to do about the single i8 min/max regression. It's also at least 4 bytes larger in code size. The benefit of the change is only that it can enable further simplifications later on (sometimes drastically as can be seen in the other tests). Considering that this lowering strategy was previously used for the i16 case that must have been the argument for it. The current patch strives to be just a compromise.

I think the proper solution would be to use some kind of sophisticated heuristic that looks at the surrounding code and chooses a different lowering depending on what is there. For example one could look if there are already other min, max or xor operations on the arguments and the result (while looking through shuffles). This would also solve the i16 case more throughly. However this sounds not so trivial to implement and it is not even clear to me if that is the right place in the code for such logic and if would be something worthwhile to pursue at all. What do you think?


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