[llvm] 82da0ca - [X86] Add computeKnownBits support for PEXT.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-09-28T22:54:07-07:00
New Revision: 82da0cabb918a13c1e5ae283d8bc9556131f922e

URL: https://github.com/llvm/llvm-project/commit/82da0cabb918a13c1e5ae283d8bc9556131f922e
DIFF: https://github.com/llvm/llvm-project/commit/82da0cabb918a13c1e5ae283d8bc9556131f922e.diff

LOG: [X86] Add computeKnownBits support for PEXT.

The number of zeros in the mask provides a lower bound on the number
of leading zeros in the result.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/bmi2-x86_64.ll
    llvm/test/CodeGen/X86/bmi2.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 7d02eefacb6f..2a7f028d3789 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -34064,6 +34064,14 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
     Known.Zero.setLowBits(Known2.countMinTrailingZeros());
     break;
   }
+  case X86ISD::PEXT: {
+    Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
+    // The result has as many leading zeros as the number of zeroes in the mask.
+    unsigned Count = Known.Zero.countPopulation();
+    Known.Zero = APInt::getHighBitsSet(BitWidth, Count);
+    Known.One.clearAllBits();
+    break;
+  }
   case X86ISD::VTRUNC:
   case X86ISD::VTRUNCS:
   case X86ISD::VTRUNCUS:

diff  --git a/llvm/test/CodeGen/X86/bmi2-x86_64.ll b/llvm/test/CodeGen/X86/bmi2-x86_64.ll
index 178ca2fcd975..35c50862ae30 100644
--- a/llvm/test/CodeGen/X86/bmi2-x86_64.ll
+++ b/llvm/test/CodeGen/X86/bmi2-x86_64.ll
@@ -79,7 +79,6 @@ define i64 @pext64_knownbits(i64 %x, i64 %y)   {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movabsq $6148914691236517205, %rax # imm = 0x5555555555555555
 ; CHECK-NEXT:    pextq %rax, %rdi, %rax
-; CHECK-NEXT:    movl %eax, %eax
 ; CHECK-NEXT:    retq
   %tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 6148914691236517205)
   %tmp2 = and i64 %tmp, 4294967295

diff  --git a/llvm/test/CodeGen/X86/bmi2.ll b/llvm/test/CodeGen/X86/bmi2.ll
index 4cd403f3c2ac..a17cb8203c3c 100644
--- a/llvm/test/CodeGen/X86/bmi2.ll
+++ b/llvm/test/CodeGen/X86/bmi2.ll
@@ -258,14 +258,12 @@ define i32 @pext32_knownbits(i32 %x)   {
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl $1431655765, %ecx # imm = 0x55555555
 ; X86-NEXT:    pextl %ecx, %eax, %eax
-; X86-NEXT:    movzwl %ax, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: pext32_knownbits:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl $1431655765, %eax # imm = 0x55555555
 ; X64-NEXT:    pextl %eax, %edi, %eax
-; X64-NEXT:    movzwl %ax, %eax
 ; X64-NEXT:    retq
   %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 1431655765)
   %tmp2 = and i32 %tmp, 65535