[llvm] e5ef523 - [X86] Add tests for D87883. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-09-28T14:21:29-07:00
New Revision: e5ef523ee46895ab5c75260b420d608f08002d97

URL: https://github.com/llvm/llvm-project/commit/e5ef523ee46895ab5c75260b420d608f08002d97
DIFF: https://github.com/llvm/llvm-project/commit/e5ef523ee46895ab5c75260b420d608f08002d97.diff

LOG: [X86] Add tests for D87883. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/bmi2.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/bmi2.ll b/llvm/test/CodeGen/X86/bmi2.ll
index 94bddf4cd603..637af86dd318 100644
--- a/llvm/test/CodeGen/X86/bmi2.ll
+++ b/llvm/test/CodeGen/X86/bmi2.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+bmi2,+cmov | FileCheck %s --check-prefixes=CHECK,X86
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK,X64
 
 define i32 @bzhi32(i32 %x, i32 %y)   {
@@ -95,6 +95,139 @@ define i32 @pdep32_anyext(i16 %x)   {
   ret i32 %tmp
 }
 
+define i32 @pdep32_demandedbits(i32 %x) {
+; X86-LABEL: pdep32_demandedbits:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl $1431655765, %ecx # imm = 0x55555555
+; X86-NEXT:    pdepl %ecx, %eax, %eax
+; X86-NEXT:    andl $1431655765, %eax # imm = 0x55555555
+; X86-NEXT:    retl
+;
+; X64-LABEL: pdep32_demandedbits:
+; X64:       # %bb.0:
+; X64-NEXT:    movl $1431655765, %eax # imm = 0x55555555
+; X64-NEXT:    pdepl %eax, %edi, %eax
+; X64-NEXT:    andl $1431655765, %eax # imm = 0x55555555
+; X64-NEXT:    retq
+  %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 1431655765)
+  %tmp2 = and i32 %tmp, 1431655765
+  ret i32 %tmp2
+}
+
+define i32 @pdep32_demandedbits2(i32 %x, i32 %y) {
+; X86-LABEL: pdep32_demandedbits2:
+; X86:       # %bb.0:
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    pdepl {{[0-9]+}}(%esp), %eax, %eax
+; X86-NEXT:    andl $128, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: pdep32_demandedbits2:
+; X64:       # %bb.0:
+; X64-NEXT:    movzbl %dil, %eax
+; X64-NEXT:    pdepl %esi, %eax, %eax
+; X64-NEXT:    andl $128, %eax
+; X64-NEXT:    retq
+  %tmp = and i32 %x, 255
+  %tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %tmp, i32 %y)
+  %tmp3 = and i32 %tmp2, 128
+  ret i32 %tmp3
+}
+
+define i32 @pdep32_demandedbits_mask(i32 %x, i16 %y) {
+; X86-LABEL: pdep32_demandedbits_mask:
+; X86:       # %bb.0:
+; X86-NEXT:    movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    pdepl %eax, %ecx, %eax
+; X86-NEXT:    andl $32768, %eax # imm = 0x8000
+; X86-NEXT:    retl
+;
+; X64-LABEL: pdep32_demandedbits_mask:
+; X64:       # %bb.0:
+; X64-NEXT:    movswl %si, %eax
+; X64-NEXT:    pdepl %eax, %edi, %eax
+; X64-NEXT:    andl $32768, %eax # imm = 0x8000
+; X64-NEXT:    retq
+  %tmp = sext i16 %y to i32
+  %tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %tmp)
+  %tmp3 = and i32 %tmp2, 32768
+  ret i32 %tmp3
+}
+
+define i32 @pdep32_demandedbits_mask2(i32 %x, i16 %y) {
+; X86-LABEL: pdep32_demandedbits_mask2:
+; X86:       # %bb.0:
+; X86-NEXT:    movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    pdepl %eax, %ecx, %eax
+; X86-NEXT:    movzwl %ax, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: pdep32_demandedbits_mask2:
+; X64:       # %bb.0:
+; X64-NEXT:    movswl %si, %eax
+; X64-NEXT:    pdepl %eax, %edi, %eax
+; X64-NEXT:    movzwl %ax, %eax
+; X64-NEXT:    retq
+  %tmp = sext i16 %y to i32
+  %tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %tmp)
+  %tmp3 = and i32 %tmp2, 65535
+  ret i32 %tmp3
+}
+
+define i32 @pdep32_knownbits(i32 %x) {
+; X86-LABEL: pdep32_knownbits:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl $1431655765, %ecx # imm = 0x55555555
+; X86-NEXT:    pdepl %ecx, %eax, %ecx
+; X86-NEXT:    movl %ecx, %eax
+; X86-NEXT:    andl $1431655765, %eax # imm = 0x55555555
+; X86-NEXT:    imull %ecx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: pdep32_knownbits:
+; X64:       # %bb.0:
+; X64-NEXT:    movl $1431655765, %eax # imm = 0x55555555
+; X64-NEXT:    pdepl %eax, %edi, %ecx
+; X64-NEXT:    movl %ecx, %eax
+; X64-NEXT:    andl $1431655765, %eax # imm = 0x55555555
+; X64-NEXT:    imull %ecx, %eax
+; X64-NEXT:    retq
+  %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 1431655765)
+  %tmp2 = and i32 %tmp, 1431655765
+  %tmp3 = mul i32 %tmp, %tmp2
+  ret i32 %tmp3
+}
+
+define i32 @pdep32_knownbits2(i32 %x, i32 %y) {
+; X86-LABEL: pdep32_knownbits2:
+; X86:       # %bb.0:
+; X86-NEXT:    movl $-256, %eax
+; X86-NEXT:    andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    pdepl {{[0-9]+}}(%esp), %eax, %ecx
+; X86-NEXT:    movl %ecx, %eax
+; X86-NEXT:    andl $-256, %eax
+; X86-NEXT:    imull %ecx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: pdep32_knownbits2:
+; X64:       # %bb.0:
+; X64-NEXT:    andl $-256, %edi
+; X64-NEXT:    pdepl %esi, %edi, %ecx
+; X64-NEXT:    movl %ecx, %eax
+; X64-NEXT:    andl $-256, %eax
+; X64-NEXT:    imull %ecx, %eax
+; X64-NEXT:    retq
+  %tmp = and i32 %x, -256
+  %tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %tmp, i32 %y)
+  %tmp3 = and i32 %tmp2, -256
+  %tmp4 = mul i32 %tmp2, %tmp3
+  ret i32 %tmp4
+}
+
 declare i32 @llvm.x86.bmi.pdep.32(i32, i32)
 
 define i32 @pext32(i32 %x, i32 %y)   {