[PATCH] D88385: [TableGen][M68K] (Patch 1/8) Utilities for complex instruction addressing modes: CodeBeads and logical operand helper functions

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu created this revision.
myhsu added reviewers: bogner, aaron.ballman, ab, Paul-C-Anagnostopoulos, hansec.
Herald added subscribers: llvm-commits, mgorny.
Herald added a project: LLVM.
myhsu requested review of this revision.

This patch adds two components: The CodeBeads TG backend and the support for InstrInfoEmitter TG backend to emit information about logical operands.

CodeBeads are annotations for instructions to express _non-trivial amount_ of addressing modes in an easier way. Many instructions of M68K, like many other CISC architectures, can be used with variety of addressing modes. For example, JSR (i.e. function call) can be used with four different addressing modes. Without this CodeBeads utility to explicitly embed these information into instructions' TG definitions, it would be more difficult for MC to encode the instructions (e.g. need to write some sort of pattern matching code to figure out the addressing mode).

Another special property of CISC ISA is that a single instruction operand (called "logical operand" here) might consist of multiple llvm::MachineOperands. Thus this patch enables IntrInfoEmitter TG backend to (optionally) generate helper functions for logical operands.
More specifically, the `llvm::<target NS>::getLogicalOperandSize` to get the number of `llvm::MachineOperand` on a specific logical operand; `llvm::<target NS>::getLogicalOperandIdx` to get the `llvm::MachineOperand` index for a specific logical operand.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88385

Files:
  llvm/include/llvm/Target/Target.td
  llvm/utils/TableGen/CMakeLists.txt
  llvm/utils/TableGen/CodeBeadsGen.cpp
  llvm/utils/TableGen/InstrInfoEmitter.cpp
  llvm/utils/TableGen/TableGen.cpp
  llvm/utils/TableGen/TableGenBackends.h

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