[llvm] 6d374cf - [X86] Add 64-bit target tests

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat Sep 26 14:08:29 PDT 2020


Author: Simon Pilgrim
Date: 2020-09-26T22:07:51+01:00
New Revision: 6d374cf78c8a80a0bbfc7ce9bc80b3f183f44c80

URL: https://github.com/llvm/llvm-project/commit/6d374cf78c8a80a0bbfc7ce9bc80b3f183f44c80
DIFF: https://github.com/llvm/llvm-project/commit/6d374cf78c8a80a0bbfc7ce9bc80b3f183f44c80.diff

LOG: [X86] Add 64-bit target tests

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/2012-07-10-extload64.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/2012-07-10-extload64.ll b/llvm/test/CodeGen/X86/2012-07-10-extload64.ll
index 67cfa3a7135f..85832639c149 100644
--- a/llvm/test/CodeGen/X86/2012-07-10-extload64.ll
+++ b/llvm/test/CodeGen/X86/2012-07-10-extload64.ll
@@ -1,14 +1,22 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-win32 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-pc-win32 -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X64
 
 define void @load_store(<4 x i16>* %in) {
-; CHECK-LABEL: load_store:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
-; CHECK-NEXT:    paddw %xmm0, %xmm0
-; CHECK-NEXT:    movq %xmm0, (%eax)
-; CHECK-NEXT:    retl
+; X86-LABEL: load_store:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT:    paddw %xmm0, %xmm0
+; X86-NEXT:    movq %xmm0, (%eax)
+; X86-NEXT:    retl
+;
+; X64-LABEL: load_store:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
+; X64-NEXT:    paddw %xmm0, %xmm0
+; X64-NEXT:    movq %xmm0, (%rcx)
+; X64-NEXT:    retq
 entry:
   %A27 = load <4 x i16>, <4 x i16>* %in, align 4
   %A28 = add <4 x i16> %A27, %A27
@@ -18,23 +26,33 @@ entry:
 
 ; Make sure that we store a 64bit value, even on 32bit systems.
 define void @store_64(<2 x i32>* %ptr) {
-; CHECK-LABEL: store_64:
-; CHECK:       # %bb.0: # %BB
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT:    xorps %xmm0, %xmm0
-; CHECK-NEXT:    movlps %xmm0, (%eax)
-; CHECK-NEXT:    retl
+; X86-LABEL: store_64:
+; X86:       # %bb.0: # %BB
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    xorps %xmm0, %xmm0
+; X86-NEXT:    movlps %xmm0, (%eax)
+; X86-NEXT:    retl
+;
+; X64-LABEL: store_64:
+; X64:       # %bb.0: # %BB
+; X64-NEXT:    movq $0, (%rcx)
+; X64-NEXT:    retq
 BB:
   store <2 x i32> zeroinitializer, <2 x i32>* %ptr
   ret void
 }
 
 define <2 x i32> @load_64(<2 x i32>* %ptr) {
-; CHECK-LABEL: load_64:
-; CHECK:       # %bb.0: # %BB
-; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
-; CHECK-NEXT:    retl
+; X86-LABEL: load_64:
+; X86:       # %bb.0: # %BB
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT:    retl
+;
+; X64-LABEL: load_64:
+; X64:       # %bb.0: # %BB
+; X64-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; X64-NEXT:    retq
 BB:
   %t = load <2 x i32>, <2 x i32>* %ptr
   ret <2 x i32> %t


        


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