[PATCH] D87046: [PPC] Do not emit extswsli in 32BIT mode when using -mcpu=pwr9

Zarko Todorovski via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 25 13:01:22 PDT 2020


ZarkoCA marked 4 inline comments as done.
ZarkoCA added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll:1
+; RUN: llc -verify-machineinstrs -mtriple=powerpc \
+; RUN:     -mcpu=pwr9 < %s | FileCheck %s --check-prefix=32BIT
----------------
nemanjai wrote:
> I assume you are not using the script to produce the checks here because it doesn't work with 32-bit PPC codegen or something along those lines. If it does work, it would be preferable to use it.
> 
> For example, you have the `srawi` necessarily preceding the `rotlwi` but they are independent. So you go through a fair bit of trouble to keep the register allocation flexible, but the instruction order could change. And technically, there is no requirement that the target of the `slwi` is the same as the source.
> Plus the stores are missing so you are not testing that the sign bits are ending up in the right place.
Thanks for the review, I added the stores and tried to address your points.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87046/new/

https://reviews.llvm.org/D87046



More information about the llvm-commits mailing list