[PATCH] D88315: [AMDGPU] Do not generate mul with 1 in AMDGPU Atomic Optimizer

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 25 10:55:53 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/atomic_optimizations_mul_one.mir:1
+# RUN: llc -O0 -mtriple=amdgcn -run-pass=amdgpu-atomic-optimizer %s -o - | FileCheck %s
+
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It's weird to use MIR and -run-pass for an IR pass. Should have regular ll test, with an end to end llc line and an opt line for just the pass


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88315/new/

https://reviews.llvm.org/D88315



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