[PATCH] D87046: [PPC] Do not emit extswsli in 32BIT mode when using -mcpu=pwr9

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

This LGTM. My comment isn't really meant to require you to change the test, just to indicate that there are a lot of moving parts that are very difficult to account for completely. So if `update_llc_test_checks.py` works, you're better off just using that.



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Comment at: llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll:1
+; RUN: llc -verify-machineinstrs -mtriple=powerpc \
+; RUN:     -mcpu=pwr9 < %s | FileCheck %s --check-prefix=32BIT
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I assume you are not using the script to produce the checks here because it doesn't work with 32-bit PPC codegen or something along those lines. If it does work, it would be preferable to use it.

For example, you have the `srawi` necessarily preceding the `rotlwi` but they are independent. So you go through a fair bit of trouble to keep the register allocation flexible, but the instruction order could change. And technically, there is no requirement that the target of the `slwi` is the same as the source.
Plus the stores are missing so you are not testing that the sign bits are ending up in the right place.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D87046/new/

https://reviews.llvm.org/D87046